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Sahithyan's S3
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Sahithyan's S3 — Operating Systems

I/O System

A subsystem that manages communication between the system and external devices. OS abstracts hardware details, coordinates access, and ensures controlled sharing of I/O resources among users and applications.

A small software component that abstracts hardware specifics and provide a uniform device-access interface to the OS. Act as the software interface between the I/O subsystem and hardware devices.

A hardware component that manages the communication between the CPU and a specific type of I/O device. Translates high-level commands from the OS into low-level signals that the device can understand.

Contains entry for each I/O device.

When the I/O related system call returns.

I/O syscall returns only when the operation is done. Process has to wait until I/O operation completes.

I/O syscall returns immediately. Operation continues in background. Program does not have to wait for the result at the time of the call. Completion is reported later. More efficient than synchronous I/O.

Whether the thread sleeps or stays runnable during the wait.

Thread is put to sleep until operation completes. No CPU usage while waiting.

The I/O call returns immediately. If the operation cannot proceed (e.g., no data available), the call returns an error/status code instead of putting the thread to sleep.

A connection point through which an I/O device communicates with the CPU. Represents a specific hardware address(es) for a device. Not to be confused with the physical ports such as USB port.

CPU reads/writes data to the port using special instructions (e.g., IN, OUT).

Can either be:

  • Serial - one bit at a time (e.g., keyboard, mouse)
  • Parallel - multiple bits at a time (e.g., printer)

Shared communication path amount system components.

  • Data bus: carries actual data.
  • Address bus: carries device or memory addresses.
  • Control bus: carries control signals (read/write, interrupt, etc.).

Can be system-wide (like PCI, USB) or dedicated to devices.

Example:

  • PCI: system-wide; connects CPU, memory, and disk controller.
  • USB: system-wide; connects multiple peripherals like a keyboard and webcam.

Aka. host adapter. A hardware interface (chip) that controls communication between the CPU/bus and a specific device.

Interprets CPU commands and controls the device’s hardware signals. May include data buffers, control registers, and logic for error handling. Each device has its own controller.

Registers: Used for communication between the driver and device.

  • Data-in Register – Holds data from the device.
  • Data-out Register – Holds data to send to the device.
  • Status Register – Contains device status information.
  • Control Register – Receives commands from the driver.

3 different mechanisms by which the I/O devices communicate with the system.

Aka. busy-wait. CPU repeatedly checks the device’s status register until it becomes ready. Efficient for fast devices; wasteful for slow ones. CPU-driven method.

Steps:

  1. Host checks the busy bit until 0.
  2. Host sets command-ready bit to start transfer.
  3. Controller performs operation and clears bits.

Explained on its own page.

Device controller transfers blocks of data directly between memory and device controller’s internal buffer. Only 1 interrupt per block; not per byte. Used by high-speed I/O devices. Improves efficiency.

Steps:

  1. OS writes a command block (source, destination, count) into memory.
  2. DMA controller takes control of the bus (cycle stealing).
  3. Only one interrupt per block (vs. per byte).

Total time from interrupt arrival to completion of I/O operation. Higher latency is undesirable.

Time from interrupt arrival to start of ISR.

Block Devices: (e.g., Disk) → Read, Write, Seek; typically use DMA. Character Devices: (e.g., Keyboard, Mouse) → Get(), Put(). Network Devices: Managed via sockets.

A full-duplex communication channel (Unix System V). Consists of:

  • STREAM Head: User interface.
  • Driver End: Device interface.
  • Intermediate Modules: Optional processing layers.

Buffering: Temporary data storage to handle speed/size mismatches.

Caching: Stores frequently used data for faster access. Spooling: Queues output for single-access devices (e.g., printers).

Using two buffers: user & kernel. All I/O operations are done using kernel-managed buffer first. Then results will be copied to the process’ memory block. Adds overhead.

Scheduling: Orders I/O requests (may apply fairness or QoS). Device Reservation: Allocates exclusive device access; risk of deadlock. Protection: All I/O instructions are privileged; user I/O via system calls. Power Management: Controls device power states using techniques like

Component-level control, Wake locks, Power collapse (deep sleep).

CPU time used for drivers and kernel routines. Context switches due to interrupts. Data copying overhead.

Reduce context switches and data copying. Reduce interrupts via large transfers or intelligent controllers. Use DMA for block transfers. Balance CPU, memory, and I/O performance.

ConceptDescription
I/O ProtectionAll I/O instructions are privileged; user access via system calls.
DMATransfers data directly between memory and device with one interrupt per block.
Kernel I/O ServicesBuffering (speed mismatch), Caching (performance), Spooling (single-device queue).
I/O Hardware InterfaceBuilt using ports, busses, and controllers with device registers.
System Call TypesBlocking, Nonblocking, Asynchronous, and Vectored I/O.
  • Programmed I/O
    The CPU is responsible for checking the status of an I/O device and transferring data. This method is simple but inefficient, as the CPU spends time waiting for the device to be ready.
  • Interrupt-driven I/O
    The CPU initiates an I/O operation and continues executing other instructions. When the I/O device is ready, it sends an interrupt signal to the CPU, which temporarily halts its current task to handle the I/O operation. This improves efficiency by allowing the CPU to perform other work instead of waiting.
  • Direct Memory Access (DMA)
    A special controller manages data transfer between memory and I/O devices, freeing the CPU from involvement in the actual data transfer.

Operating systems are interrupt-driven. Because this approach allows the CPU to respond quickly to important events (such as I/O completion, hardware failures, or user actions) without constantly checking the status of devices.