Keyboard and Monitor
Section titled “Keyboard and Monitor”Traditional human-computer interaction devices.
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Keyboard: sends characters (each encoded in 7-bit ASCII).
- Types:
- Printable (letters, digits, symbols)
- Control (non-printable; e.g., carriage return, backspace)
- Types:
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Monitor: displays output from the system.
I/O Module
Section titled “I/O Module”A hardware interface that connects the CPU and memory with external devices. Acts as a translator and controller, managing the flow of data, control signals, and status information.
Handles timing, buffering, device-specific communication, and error detection.
Categories:
- Human-readable – monitor, printer.
- Machine-readable – disks, sensors, actuators.
- Communication – remote devices, other computers.
I/O Commands
Section titled “I/O Commands”| Type | Purpose |
|---|---|
| Control | Activate peripheral, define action |
| Test | Check device status |
| Read | Move data from peripheral → module buffer |
| Write | Move data from bus → peripheral |
Types of I/O Operations
Section titled “Types of I/O Operations”Programmed I/O
Section titled “Programmed I/O”CPU polls the devices repeatedly and waits until the operation is complete. Simple to implement (no extra interrupt hardware or handlers required). Predictable control flow and timing. Wastes clock cycles.
Typical sequence:
- CPU issues a command to the I/O device.
- CPU repeatedly reads the device status (polls).
- When status shows “ready” or “data available,” CPU performs the read or write.
- CPU continues with other work (or repeats polling) after the transfer.
Interrupt-driven I/O
Section titled “Interrupt-driven I/O”CPU continues its operation. When the I/O device is ready, it interrupts the CPU. Saves the current context (to the stack), handles the interrupt, restores the context (from the stack), and resumes execution. More efficient than programmed I/O. Requires special hardware.
Direct Memory Access
Section titled “Direct Memory Access”Aka. DMA. Data transferred between memory and I/O device directly. Avoids dependending on the CPU. Special instructions to control the DMA.
I/O Addressing
Section titled “I/O Addressing”Refers to how a computer identifies and communicates with I/O devices.
Each I/O device is assigned a unique address or range of addresses. CPU uses these address(es) to communicate with the device.
Memory-Mapped
Section titled “Memory-Mapped”I/O devices share the same address space as the system memory. Instructions used for memory access can also access I/O devices. Simplifies design. Usually faster, and easy to program. Reduces the total memory address range available for RAM. Preferred in modern processors.
I/O Mapped
Section titled “I/O Mapped”Aka. isolated I/O or port mapped. I/O devices have a separate address space. Special I/O instructions (like Intel’s IN, OUT) are used to communicate with peripherals. This keeps memory and I/O addresses distinct but requires extra instructions and control logic.
General Purpose I/O Port
Section titled “General Purpose I/O Port”-
Configurable for:
- Digital input/output
- Analog input/output
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Controlled using special function registers.
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Must be configured for intended function before use.
Device Identification (Interrupt Handling)
Section titled “Device Identification (Interrupt Handling)”Methods:
- Multiple interrupt lines – each module has dedicated line.
- Software poll – CPU checks modules sequentially (slow).
- Daisy chain (hardware poll) – modules connected in chain; first ready device handles.
- Vectored interrupt – device sends vector (address of its service routine).
- Bus arbitration – device must first control bus to request interrupt.
Drawbacks of Programmed / Interrupt I/O
Section titled “Drawbacks of Programmed / Interrupt I/O”- Limited by CPU speed.
- CPU time wasted managing I/O. → Solution: Direct Memory Access (DMA).
DMA Operation
Section titled “DMA Operation”Idea: I/O module moves data directly between device and memory.
- CPU initiates DMA and gets interrupt after completion.
- Frees CPU for other processing.
- Requires bus arbitration (DMA controller competes for system bus).
Evolution of I/O Function
Section titled “Evolution of I/O Function”- CPU directly controls device.
- I/O controller added – programmed I/O.
- Interrupts introduced – more efficient.
- DMA added – block transfer without CPU.
- I/O module becomes processor-like (own instruction set).
- I/O module gains local memory → acts as mini-computer (e.g., GPU).
I/O Channel Architecture
Section titled “I/O Channel Architecture”- Specialized processors managing multiple I/O devices.
- Example: PCIe architecture
- Uses root complex (chipset).
- Supports device-to-device communication (not just CPU-to-device).
External Interconnection Standards
Section titled “External Interconnection Standards”| Type | Examples |
|---|---|
| Parallel | Parallel port, IDE |
| Serial | Serial port, SATA, SCSI, USB |
| Bus-based | PCI, PCIe |
| Network | Ethernet, Wi-Fi, Thunderbolt, Infiniband |
Summary
Section titled “Summary”- External devices: keyboard, monitor, disk.
- I/O modules: control, data, status handling.
- I/O Techniques: programmed, interrupt, DMA.
- Advanced concepts: I/O channels, bus systems, interconnection standards.